Extreme - Scale Computer Architecture

Increased transistor integration will soon allow us to build processor chips with over 1,000 cores. To construct such a chip, energy and power consumption are the most formidable obstacles. Hence, we need to design it from the ground up for energy efficiency. First of all, we want to operate at low voltage, since this is the point of maximum energy efficiency. In such an environment, however, we have to deal with process variation. Hence, it is important to design techniques to tolerate it. At the architecture level, we require simple cores organized in a hierarchy of clusters. Moreover, we also need techniques to reduce the leakage of on-chip memories and to lower the voltage guardbands of logic. Finally, data movement should be minimized, through both hardware and software techniques. With a systematic approach that cuts across multiple layers of the computing stack, we can deliver much higher energy efficiencies.